class ForwardingUnit(object):
    def detectForwardA(self, oppcode, idexMduOp, exmemRegWrite, memwbRegWrite, idexRegRS, idexRegRT, exmemRegRT, memwbRegRT, exmemRegRD, memwbRegRD):
        print("exmemRD and memwbRD and idexRS and idexRT Status " + str(memwbRegRD) + " " + str(exmemRegRD) + " " + str(idexRegRS) + " " + str(idexRegRT) )
        if (oppcode == 0): #rtype
            if ( (exmemRegWrite == 1) and (exmemRegRD != 0) and (exmemRegRD == idexRegRS) ):
                print("RD = RS " + str(exmemRegRD) + " " + str(idexRegRS) )
                return 2
            ##if (memwbRegWrite == 1) and (memwbRegRD != 0) and not(exmemRegWrite==1 and (exmemRegRD !=0) and (exmemRegRD != idexRegRS) and (memwbRegRD == idexRegRS) ):
            if ( (memwbRegWrite == 1) and (memwbRegRD != 0) and (memwbRegRD == idexRegRS) ): 
                print("RD = RS " + str(memwbRegRD) + " " + str(idexRegRS) )
                return 1
        elif (oppcode != 0 and (oppcode & 0b111110) != 0b000010 and (oppcode & 0b111100) != 0b010000): ##I Type
            print("Forward I Type oppcode")
            if ( exmemRegWrite == 1 and exmemRegRT != 0 and exmemRegRT == idexRegRS ):
                return 2
            if ( memwbRegWrite == 1 and memwbRegRT != 0 and memwbRegRT == idexRegRS ):
                return 1 
        return 0

    def detectForwardB(self, oppcode, idexMduOp, exmemRegWrite, memwbRegWrite, idexRegRS, idexRegRT, exmemRegRT, memwbRegRT, exmemRegRD, memwbRegRD):
        print("exmemRD memwbRD and idexRS and idexRT Status " + str(memwbRegRD) + " " + str(exmemRegRD) + " " + str(idexRegRS) + " " + str(idexRegRT) )
        if (oppcode == 0): #rtype
            if ( (exmemRegWrite == 1) and (exmemRegRD != 0) and (exmemRegRD == idexRegRT) ):
                print("RD = RT " + str(exmemRegRD) + " " + str(idexRegRT) )
                return 2
            ##if (memwbRegWrite == 1) and (memwbRegRD != 0) and not(exmemRegWrite==1 and (exmemRegRD !=0) and (exmemRegRD != idexRegRT) and (memwbRegRD == idexRegRT) ):
            if ( (memwbRegWrite == 1) and (memwbRegRD != 0) and (memwbRegRD == idexRegRT) ):
                print("RD = RT " + str(memwbRegRD) + " " + str(idexRegRT) )
                return 1
        return 0
